Selective epitaxial growth (SEG) of silicon and silicon-germanium alloy layers can be used in both CMOS and bipolar semiconductor devices. In the SEG method, the epitaxial layer is selectively grown only on an exposed silicon surface and not on the field area of the device. This selective deposition results in a device structure having fine dimensional isolation with high aspect ratio geometry and small effective channel-width deviation from the design width. As a result, reduction of chip size and area (with CMOS devices) is achieved.
Known methods of selectively growing epitaxial silicon layers involve using a masking layer, generally silicon dioxide, to prevent growth of the epitaxial layer on the field areas. A number of methods are known for selectively growing epitaxial silicon with respect to silicon dioxide using SiH.sub.2 Cl.sub.2 /HCl or SiCl.sub.4 /H.sub.2 chemistry with either atmospheric or low pressure chemical deposition techniques.
In all of the known methods, however, the process temperature for the epitaxial layer deposition is always in the range of 650.degree. to 1100.degree. C. These high temperatures cause problems such as greater stress, silicon warding, deformation of fine structures, degradation of doping profile, and overall thermal degradation of the semiconductor device. As understood, no such process is presently known for the selective growth of an epitaxial silicon layer at temperatures below 650.degree. C.